Exp : 3-7 Years
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Implementation of multimillion gate SoC designs in cutting edge process technologies (28nm, 45nm & 65nm)
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Work on all aspects of physical design including synthesis, floor planning, place and route, clock distribution, IP integration, extraction, timing closure, power and signal integrity analysis, physical verification, DFM, and tapeout
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Clear understanding and command over all aspects of physical design
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Expertise in Synopsys IC Compiler / Magma Talus / Cadence SoC Encounter
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Skill and experience in scripting using Tcl or Perl desirable
Professional interested can revert to : lijith@roljobs.com
Thanks & Regards,
Lijith V V,
Roland & Associates -Leaders in Social Media Recruitment.
Vanguardrise , off Airport Road,Bangalore - 17
Blog : http://rolandassociates.blogspot.com,
Tel:+91-080-42821619
E-Mail: lijith@roljobs.com; lijith@medicalnaukri.com
Linkedin : http://in.linkedin.com/pub/lijith-v-v/25/b77/8b4
Internet: www.roljobs.com; www.roljobs.net; www.medicalnaukri.com
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